Nano-fabrication includes the fabrication of very small structures that have features on the order of 100 nanometers or smaller. One application in which nano-fabrication has had a sizeable impact is in the processing of integrated circuits. The semiconductor processing industry continues to strive for larger production yields while increasing the circuits per unit area formed on a substrate; therefore nano-fabrication becomes increasingly important. Nano-fabrication provides greater process control while allowing continued reduction of the minimum feature dimensions of the structures formed.
An exemplary nano-fabrication technique in use today is commonly referred to as nanoimprint lithography. Nanoimprint lithography is useful in a variety of applications including, for example, fabricating layers of integrated devices such as CMOS logic, microprocessors, NAND Flash memory, NOR Flash memory, DRAM memory, or other memory devices such as MRAM, 3D cross-point memory, Re-RAM, Fe-RAM, STT-RAM, and the like. Exemplary nanoimprint lithography processes are described in detail in numerous publications, such as U.S. Pat. No. 8,349,241, U.S. Pat. No. 8,066,930, and U.S. Pat. No. 6,936,194, all of which are hereby incorporated by reference herein.
A nanoimprint lithography technique disclosed in each of the aforementioned U.S. patents includes formation of a relief pattern in a formable (e.g. polymerizable) layer and transferring a pattern corresponding to the relief pattern into an underlying substrate. The patterning process typically uses a template spaced apart from the substrate with the formable applied as a liquid to the substrate, e.g., by drop dispense techniques. The formable liquid is solidified to form a solid layer that has a pattern conforming to a shape of the surface of the template that contacts the formable liquid. After solidification, the template is separated from the solidified layer. In certain cases, this process is then repeated across the substrate on a field-by-field basis until the entire substrate is patterned (a so-called “step-and-repeat” process). The substrate is then subjected to additional processes, such as etching processes, to transfer a relief image into the substrate that corresponds to the pattern formed in the solidified layer. In such step-and-repeat processes in particular, it is desirable to avoid extrusion of the formable material beyond the template patterning surface. When such extrusion occurs, it can lead to a variety of imprint and post-imprint defects.